
//+define+DFVE_DRIVER 
//+define+DFVE_MONITOR 
//+define+DFVE_GENERATOR
//+define+VPD_MEM_ON


+incdir+/icdev/users/kkzhang/project/sblocks/jz4785/work/tb_fxu_mul_mpipeline
//+define+TOOL_VCS


-sverilog
/icdev/users/kkzhang/dc/testsyn/mul_mips_final/src/full_pipeline_ctrl.sv
// /icdev/users/kkzhang/project/sblocks/jz4785/src/sim_lib/sim_func/sim_func.sv
// /icdev/users/kkzhang/project/sblocks/jz4785/src/add/testbench/test_cases/test_cases.sv
// /icdev/users/kkzhang/project/sblocks/jz4785/src/mul/testbench/tb_fxu_mul.sv   
// /icdev/users/kkzhang/project/sblocks/jz4785/src/mul/design/fxu_booth2_pp_gen.sv
// /icdev/users/kkzhang/project/sblocks/jz4785/src/mul/design/fxu_mul_top.sv      
// /icdev/users/kkzhang/project/sblocks/jz4785/src/mul/design/fxu_mul_mix.sv      
// /icdev/users/kkzhang/project/sblocks/jz4785/src/mul/design/fxu_mul_addsub.sv   
// /icdev/users/kkzhang/project/sblocks/jz4785/src/mul/design/compress32.sv      
// /tools/synopsys/synlib/dw/dw01/src_ver/DW01_add.v
// /tools/synopsys/synlib/dw/dw02/src_ver/DW02_tree.v
      

/icdev/users/kkzhang/project/sblocks/jz4785/src/sim_lib/sim_func/libdpi.so
